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Hi there!
This is my first post.
In EMOSFET when Gate to Source voltage Vgs=O and Drain to Source Voltage Vds is at some positve potential then there are two reverse biased junctions. How??????
read the paragraph.
One junction has zero bias if Vbs=0. You left that bit out.
You refer to the body not at all.
The body should always be biased such that neither of the
junctions goes forward-conducting. That's not a "how?".
That's an application rule, to keep Bad Things from happening.
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