This is where things start to get gray. Here are my best attempts to answer your questions.
1) I am not very familiar with all of the tools you mentioned here, but generally any tool wanting to make sense out of the design (and/or environment) has to go through some, if not all, stages of the process ('build' so called in the SW world). Please refer to the answer for 3) for more discussion.
2) In very general terms, a tool does the following in each phase. Again, it depends on the tool and how deep it needs to go in each phase based on the capabilities it needs to serve. Some are language-specific, and some are tool-specific.
Analyze Phase: A tool would analyze source code mainly for syntax errors, expansion of text macros, and such. Some tools create working/intermediate files for later use.
Elaboration Phase: A tool would stitch things (design components, verification components, and/or both) together. In this phase, the tool reports unresolved elements, if any. The intermediate files created in the analyze phase are further processes and a new set of intermediate files are creates (sometimes called object files).
Link Phase: A tool would link the intermediate (object) files created in the elaboration phase in addition with external libraries (needed by the tool and/or design/environment (PLI, CPI, DPI, etc. based library or extension of the environment or model).
3) The phases I mentioned are logical; some tools combine all in one process step or some split in two or even three. It all depends on the tool. Please refer to its documentation. Again, there could be a slight confusion regarding what is called compilation. I have used the term "compilation process" with the respect to "building" an executable for simulation, analysis (i.e. STA, Lint) or other purposes. I guess a more appropriate term would be "build", but then again it has its issues when it is generalized for all tools. Anyways, If you were to refer to the SystemVerilog spec (Section 3.12), then you would find what I called the Analyze Phase is actually referred as "Compilation". However, if you were to refer to a tool-specific documentation such as VCS, then it may be referred as "Analysis". So the answer to your questions is twofold: experience (and knowledge from the SW build process) and organizing things from you read in a tool documentation (or specification) to these phases (sometimes explicitly or implicitly mentioned).
Hope this will help to clear some of your questions.