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dV/dt switching noise causes SPI communication to fail

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Nov 21, 2022
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I have switching noise on a test bench that I've been using for a while now. This test bench is used to test prototype PMSM machines designed to reach high speed levels (70000 RPM). We're planning on mechanically coupling two machines front to front (one as a motor and one as a generator) to increase the mechanical power.

For that, I have two inverters, one for the motor machine and one for the generator machine (so one will act like a standard inverter and the other one will act like a rectifier). Of course, there is a power supply to "beat" the system losses otherwise the whole thing would not work.

Here is the datasheet for the inverter (can't find the URL so I have to post a picture) :

The 3 half-bridges used are SKM350MB120SCH17, which are SiC MOSFETs.

Here's the problem : we using a 750 VDC bus to power the inverter, and those MOSFETs are quite fast, so the encoder that is used for FOC control of the motor often fails because of the dV/dt noise injected by the switching.

Because this is already a long post, I'll leave it here for now but if anyone is interested I can go in further details. Let me know.

I presume (and I can only presume) that youre saying the switching of the MOSFETS is causing transients to appear on your SPI bus. How do you know this? Could the noise be coupled into a reset line or some other signal? Is it coupled through the ground? Through the air? Through a DC power bus? Is your SPI bus differential? Shielded?

There’s not nearly enough information here.
Usual thing is to damp the mosfet switching a little bit with gate series resistor. Not too much otherwise big switching loss.
Also, you can put the sensor signal in a shielded cable.
Also, just generally shield the switchign nodes...say with "quiet node" copper on a different layer of the PCB.
Apparently you are connecting motors to inverters without any filters. This will rarely meet EMC requirements and as you see, is even problematic in a lab test setup.

We would need to know more details (motor and encoder cabling, available encoder interface options, already implemented common mode filtering) to determine if there's some hope to make the test setup work. Probably yes.
Definitely going to need to see pictures of the setup to debug this. Need to see how the components are grounded, including the housing of the motor.
Apparently you are connecting motors to inverters without any filters. This will rarely meet EMC requirements and as you see, is even problematic in a lab test setup.
I'm always surprised by how many drives I see with zero filtering, I guess this results from trying to minimize size.
SPI is relatively slow so you might look at burdening any long lines with shunt C, maybe some input RC at the SPI RX pins?
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