Well, if you have access to some PDK that has nominal, medium and native VT devices (like TSMC 0.25, 0.18, 0.13 etc) I will start by going through the spice models, running characterization simulations and generating layout using Pcells (usually native and medium doped devices have an extra layer to block the deposition of extra dopants used to make VT higher); that way you can get a lot of information and an initial idea of where each type of transistor stands with respect to the others.
diemilio