dual slope adc opamp gain

Status
Not open for further replies.

avoulk

Newbie level 1
Joined
Dec 4, 2010
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,287
hi

i have to design a 14-bit dual slope adc. How can i choose the appropriate gain for the opamp(integrator) and comparator?

Any help would be appreciated..
 

I think the most important spec for your opamp and comparator will be offset voltage. There's not really a 'gain' for the integrator, there's a volts/sec constant, and that's going to depend on your requirements. How fast do you need to do the conversion? How fast is your clock? It's going to take 2*2^14 (32786) clock cycles to do a conversion.
 
Reactions: avoulk

    avoulk

    Points: 2
    Helpful Answer Positive Rating
I think the most important spec for your opamp and comparator will be offset voltage. There's not really a 'gain' for the integrator, there's a volts/sec constant, and that's going to depend on your requirements.
In industry standard dual slope circuits, integrator and comparator offset voltage are eliminated, that's why these circuits achieve good performance with standard CMOS technology. Insufficient integrator gain however causes a linearity error due to deviation from ideal ramp waveform. Comparator response time causes a magnitude offset.
 
Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…