dual slope adc control logic example needed

[wls]

Hello . Any one have example for dual slope adc control logic in verilog and also include state machine ? An analog perosn , still new , but learning . Now doing a 10/12 bit integrating/dual slope adc , stuck on the control logic side .

Example of similar device datasheet : http://www.datasheetcatalog.org/datasheet/maxim/ICL7109.pdf

Thx in advance .