analog2003
Newbie level 5
Hi all,
I am using the TSMC CMOS LOGIC 0.18um (3.3V) technology. I was wondering in which stage of the digital design flow would I have to mention about dual power supply (+/- 1.65 V). I am in the synthesis stage and the library I am using has a nominal voltage of 1.8 V for a tt process corner. There are no libraries with a nominal voltage of 3.3 V. I am afraid that using the 1.8V library would be of little use to me, 'cos it would then report wrong area, power, etc. Please throw some light on this topic as I am doing this for the first time.
Thanks in advance
I am using the TSMC CMOS LOGIC 0.18um (3.3V) technology. I was wondering in which stage of the digital design flow would I have to mention about dual power supply (+/- 1.65 V). I am in the synthesis stage and the library I am using has a nominal voltage of 1.8 V for a tt process corner. There are no libraries with a nominal voltage of 3.3 V. I am afraid that using the 1.8V library would be of little use to me, 'cos it would then report wrong area, power, etc. Please throw some light on this topic as I am doing this for the first time.
Thanks in advance