kannan2590
Member level 4
Hi all,
I am working currently in a project( Virtex-4 FPGA) where i want to add
two signals of 42 bits each with a clock frequency of 200MHz.
So for this addition, I want use only dsp48 accumulator for the first operation.
How to write VHDL code for this, so that it will infer to DSP48 accumulator ?
I am working currently in a project( Virtex-4 FPGA) where i want to add
two signals of 42 bits each with a clock frequency of 200MHz.
So for this addition, I want use only dsp48 accumulator for the first operation.
How to write VHDL code for this, so that it will infer to DSP48 accumulator ?