DRC Error : Poly2 to unrelated metal1 spacing is 0.6um

[raguna]

Hi,
I am designing a capacitor with low parasitics. I tried to layout with (Poly1 conntected to M1) with (Poly2 conntected to M2). After I layout Nwell+Poly1+poly2, there was no DRC, but after I add metal 1 on it, it has a DRC error "Poly2 to unrelated metal1 spacing is 0.6um". I am designing in AMI 05um process.

Thanks

 

[erikl]

Show the relevant part of your layout!

 

[raguna]

Hi Erikl,

 

[dick_freebird]

These "related" rules must attempt to determine connectivity
(or "relatedness") in order to judge. I recommend you drill
down to the rule in question and parse its logic. There may
be things like recognition layers to say that metal is
"related", to get the structure recognized as a capacitor
stack rather than random interconnect or whatever. Or
"related" could mean "connected" and then you're simply
screwed by the over-narrow ideas of the CAD people who
wrote rules based on the known-blessed device set at the
time. Been there.

 

[erikl]

View attachment 101311

I guess dick_freebird could be right: missing cap recognition layer?

BTW: Did you try (Poly1 conntected to M2) to (Poly2 conntected to M1) ? Corresponding error message?

 

[raguna]

Hi all,
I told the fab to ignore that error and everything works fine after it came from fab.

Thanks all.