embpic
Advanced Member level 3
- Joined
- May 29, 2013
- Messages
- 742
- Helped
- 80
- Reputation
- 160
- Reaction score
- 77
- Trophy points
- 1,308
- Location
- india
- Activity points
- 5,213
i have doubt regarding oscillator frequency.
i am using 18f4550, XC8 compiler, primary oscillator of 20MHz. i am keeping following configuration
#pragma config FOSC=HS, FCMEN=ON, WDT=OFF, IESO=ON, XINST=OFF, LVP=OFF
#define _XTAL_FREQ 20000000
so it cleared that i am using machine cycle of 5MHz frequency.
bit 4-3 CPUDIV1:CPUDIV0: System Clock Postscaler Selection bits
For XT, HS, EC and ECIO Oscillator modes:
11 = Primary oscillator divided by 4 to derive system clock
10 = Primary oscillator divided by 3 to derive system clock
01 = Primary oscillator divided by 2 to derive system clock
00 = Primary oscillator used directly for system clock (no postscaler)
For XTPLL, HSPLL, ECPLL and ECPIO Oscillator modes:
11 = 96 MHz PLL divided by 6 to derive system clock
10 = 96 MHz PLL divided by 4 to derive system clock
01 = 96 MHz PLL divided by 3 to derive system clock
00 = 96 MHz PLL divided by 2 to derive system clock
if i configure the above as divide by 2 for primary clock then is my machine cycle frequency get double?
means as they given that each clock cycle get divide by 4 for 1 machine cycle then will get divide by 2?
how to check frequency on which pic is running using pickit3 ??
i am using 18f4550, XC8 compiler, primary oscillator of 20MHz. i am keeping following configuration
#pragma config FOSC=HS, FCMEN=ON, WDT=OFF, IESO=ON, XINST=OFF, LVP=OFF
#define _XTAL_FREQ 20000000
so it cleared that i am using machine cycle of 5MHz frequency.
bit 4-3 CPUDIV1:CPUDIV0: System Clock Postscaler Selection bits
For XT, HS, EC and ECIO Oscillator modes:
11 = Primary oscillator divided by 4 to derive system clock
10 = Primary oscillator divided by 3 to derive system clock
01 = Primary oscillator divided by 2 to derive system clock
00 = Primary oscillator used directly for system clock (no postscaler)
For XTPLL, HSPLL, ECPLL and ECPIO Oscillator modes:
11 = 96 MHz PLL divided by 6 to derive system clock
10 = 96 MHz PLL divided by 4 to derive system clock
01 = 96 MHz PLL divided by 3 to derive system clock
00 = 96 MHz PLL divided by 2 to derive system clock
if i configure the above as divide by 2 for primary clock then is my machine cycle frequency get double?
means as they given that each clock cycle get divide by 4 for 1 machine cycle then will get divide by 2?
how to check frequency on which pic is running using pickit3 ??