Oct 26, 2006 #1 G gauz Junior Member level 3 Joined Jul 18, 2005 Messages 26 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,537 I set up a new project and load my design files in verilog, but ise could not read the included file in which there are many macro difinition, is there any setting in ise? how to set it??? thanks in advance!
I set up a new project and load my design files in verilog, but ise could not read the included file in which there are many macro difinition, is there any setting in ise? how to set it??? thanks in advance!
Oct 26, 2006 #2 V vs21 Junior Member level 3 Joined Jun 8, 2006 Messages 27 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,450 Re: doesn't ISE6.2 support include file????????? how to set Hi, You have to add that file also to the project. If suppose it is netlist then, specify the macro path in the Implementations properties. Regards vs21
Re: doesn't ISE6.2 support include file????????? how to set Hi, You have to add that file also to the project. If suppose it is netlist then, specify the macro path in the Implementations properties. Regards vs21