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Does SSF Track-and-Hold need to have non-overlapping Clk signals?

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Swordsman9

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Hi fellas,

I am designing a high speed track and hold in Switched-Source-Follower topology. But I don't know whether the clock signals should be non-overlapping or not.

I have read a lot about the Switched-Capacitor type, and understand their clock signals should be non-overlapping. But what about SSF? I don't remember reading anything about their clocking.

My thought is that as current steering switching is said to be faster than voltage switching, the SSF should have continuous current flowing. Therefore, the clock should not be non-overlapping. they should be overlapped?

Best regards,

Swordsman
 

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