vphaniendra
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does a FPGA need external clock input like 50MHZ and all....
I am using for implementing a USART in ALTERA STRATIX...where my data is synch clock coming from outside..i want to use it for all my internal devices.
Should I put a clock source also to the PLL dedicated clock inputs?? is it necessary..
I am using for implementing a USART in ALTERA STRATIX...where my data is synch clock coming from outside..i want to use it for all my internal devices.
Should I put a clock source also to the PLL dedicated clock inputs?? is it necessary..