Do we need to check the phase margin for positive feedback loop?

[surianova]

hi all!

in the bandgap got 2 loop. One is negative feedback and the other one is positive feedback. Do we need to check the phase margin for positive feedback loop?

 

[Alan_Nesta]

phase margin

you need check both loop, then use negative pm subtract positive one.

 

[surianova]

Re: phase margin

you need check both loop, then use negative pm subtract positive one.

how ? if i got 90 degree for both loop, then i substract , it become 0 degree phase margin!

 

[Alan_Nesta]

phase margin

I think you'd cut both feedback loop and then get the PM.

 

[lijianheng]

Re: phase margin

I think checking the negative feedback loop PM is enough.

Because in the bandgap, negative feedback is always stronger some dB than positive feedback, by subtracting them, it can be seen as only the negative feedback affect the loop performance.

Please make attention that some dB larger is multiply by a large number, so negative feedback - positive feedback ≈ negative feedback.

 

[DenisMark]

phase margin

I shouldn't check phase margin in bandgap (and other biasing circuits), because result of AC simulation may be deceiving. If u want u can fit phase and gain margin of negative loop though AC simulation. But always check stability during transient analisys with slow and fast supply voltage ramp.

I cite :
" Verification of the biasing circuit has to be done by transient simulation,
with slow ramping of the supply voltage first, followed by switching of the
load current and supply voltage. AC small-signal simulations may be
deceiving. For example, it is interesting to notice that AC simulations of the
phase margin in the voltage regulators provide results that would be
unacceptable in the OpAmps (5o phase margin, for example). Yet, the
simulations of step-response transient or experimental verification of this
response on the silicon chip show quite sufficient excess stability. Also, the
start-up problems in biasing circuits are likely to cause conditional
instability, and AC simulations do not detect this circuit problem."

 

[surianova]

Re: phase margin

I shouldn't check phase margin in bandgap (and other biasing circuits), because result of AC simulation may be deceiving. If u want u can fit phase and gain margin of negative loop though AC simulation. But always check stability during transient analisys with slow and fast supply voltage ramp.

I cite :
" Verification of the biasing circuit has to be done by transient simulation,
with slow ramping of the supply voltage first, followed by switching of the
load current and supply voltage. AC small-signal simulations may be
deceiving. For example, it is interesting to notice that AC simulations of the
phase margin in the voltage regulators provide results that would be
unacceptable in the OpAmps (5o phase margin, for example). Yet, the
simulations of step-response transient or experimental verification of this
response on the silicon chip show quite sufficient excess stability. Also, the
start-up problems in biasing circuits are likely to cause conditional
instability, and AC simulations do not detect this circuit problem."

may i know still need to check PM for positive feedback loop?

 

[iamxo]

Re: phase margin

From the view point of DenisMark, you should not check either loop of the bandgap.

Just do transient simulation.

 

[ambreesh]

Re: phase margin

The acid test is always transient simulation.
But that does not mean that we donot do AC simulations.
I would in case of BGR always see the loop gains.
Then transient will tell its own story.

 

[surianova]

Re: phase margin

The acid test is always transient simulation.
But that does not mean that we donot do AC simulations.
I would in case of BGR always see the loop gains.
Then transient will tell its own story.

any reference how to to do AC stability test? And my question again, do i need to check the PM of positive loop?

 

[ambreesh]

Re: phase margin

You will have to break the loop at both inputs. But an ideal unity gain VCVS after the diode and diode plus resistor. Add series ac source at ouput of VCVS one terminal to positive terminal of VCVS and other going to gate of the differential pair.
When you simulate have ac signal as 1 in one of them, get the gain (negative or positive loop). See to it that negative gain is always greater than positive.
And as long as the negative loop gain is more than positive loop gain the system will be stable.