Yes, NMOS should in theory not require a capacitor, but I think you still need something out there because you don't want your phase margin to be anything less than 45 degrees. So if you have a good loop gain with a large gain at low frequencies and crossing the 0dB point with -20db/decade slope, the system should be pretty stable. The power supply rejection ratio tells us how sensitive the system stablity is to changes in the input voltage. If you have a large enough low-frequency loop gain the PSRR shoud be inversely proportional to the loop gain.
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\[v_c\]