I have rarely seen I2C/SPI peripherads operate at freq >25MHz (25MHz is really high), whereas an ARM core based processor system will operate at >100MHz. So you are looking here to gather data from peripherals which are atleast 4x times slower.
So having large amount of memory space for such slow peripherals is a bad design, it is just a wastage of hardware resources. Any good hardware design engineer will try to save as much as possible silicon real estate.
Then again look at the AMBA spec of various protocols. 4KB is the recommended highest boundary for AXI slaves, 1KB is specified for AHB and if I am not mistaken, APB does not specify any minimum, instead it just takes the minimum defined by whatever bus is driving the APB bridge.
So considering the above, I DO NOT see a good reason to put a DMAC for the ARM to directly access the slaves with such low memory space.