Digital oscilloscope Project

[mgajo]

digital storage oscilloscope project+arm7

Hi
ready to go :epemag oct 2000

pic soft + pc soft + pcb + (free)

 

[lighty]

firmware jyetech

EPE V-Scope has bandwidth 1kHz-10kHz.

You can do better with soundcard.

 

[ianomaley]

oscilloscope 20msps digital 100mhz analog

Does anybody has information or a brief tutorial on protections at the input stage of a oscilloscope? For a general instrument probably end users may apply out-of-range- voltages frequently.

Ian

 

[pisoiu]

pc schematic oscilloscope

Does anybody has information or a brief tutorial on protections at the input stage of a oscilloscope? For a general instrument probably end users may apply out-of-range- voltages frequently.

Ian

Check AD8065 from www.analog.com . It is a high input impedance opamp, high speed. Search in its datasheet for "input protection", it is at page 17 in revision D. You can use it as input buffer, right after divider.

/pisoiu

 

[devrimaksin]

pc oscilloscope schematic and pcb

It is not easy to implement Time-Interleaved ADC's.
1. The main reason for that is the simple ADC errors, such as gain and offset error in a regular ADC (which in fact are not considered as an error in system perspective because they can be compansated) becomes very serious issue for the Time interleaved structure. Here is the reason for that, assume that you have 10 slow ADC that you clock sequentially, 9 of them are completely identical and the tenth one has an ofsett error. When you apply a DC signal to the input, 9 out of ten ADC will give you the same output whereas the tenth one's output will be different, this situation creates a signal at 1/10 of the sampling frequency (which is not existing at the input). So the channel mismatch is a big concern at the end, the effective number of bit that, you can get can be very small (SO even though, you use 10 bit ADC's, you can get effectively only 7 bits or even less). I presume you are trying to increase number of bits while keeping sampling frequency high also, because of the problem that I described above, generally, people try to build and single fast ADC instead of trying to fix the channel mismatch problem.
2. You have to have very good, Track & hold architecture at the input of ADC. Since individual ADC is designed to work at the lower frequency their signal sampling capabilities are generally designed accordingly, so
generally speaking you have to sample the input signal longer for slow ADCs. You can check this feature from the DataSheet of the ADC, input signal bandwidth of the converter should be at least 10 times (for 8 bit resolution) bigger.
3. I doubt that you can use PC's memory directly, because the ADC will dump data with a constant rate, so it should be sampled and written reqularly (without interruption or anything). That is why commercially available PC Scope cards use dedicated RAMs. Of course this asumption is based on that you want to go fast. If the sampling rate is low, you dont need to be concerned about this (but, you dont have to build a time-interleaved ADC also ).

Anyway, I guess everything depends on what your target resolution and sampling rate is.

 

[beshan]

usb pıc 2 mhz frekans metre circuit indir

Hey monnoliv

I saw the schematic for the USB section of the Digital Oscillascope. I am thrilled that I can buy the component from you, but I am more excited to try making it myself for the first time. Could you let me know how I can use your website to get the necessary information to do this ? Do you have the schematic , and layout uploaded on the website ? if so where can i find it ? are the others making it by them selves or are they gonna get buy it from you ?

thanks !

 

[Eumel]

avr usb scope project

Hi monnoliv,

what's about the given url? I've tried several times but never succeeded to connect. Is this a personal or German problem. Who is able to connect to

h**p://164.15.88.56/site.php ?

greetings
Eumel

 

[monnoliv]

building a digital oscilloscope

Hi Eumel,

That's strange, this is my PC and it's always powered. It should work. I know that sometimes there are lags due to the database but usually it takes only few seconds to load the page. Try again...

 

[xipen]

digital sampling oscilloscope tutorial

Hi,all,
I have read the sch,and there seems to be one external trig souce, but can't see the internal one,do you implement this using the logic part?Can it trig stable?

I've read the post in page 10 about software GUI,there are sveral libs that can be used aiming for cross platform:
FLTK,h**p://fltk.org,simple and light weight.
WxWidgets,h**p://sourceforge.net/projects/wxwindows/,big with lots of things.
IT++,h**p://sourceforge.net/projects/itpp/,mathematical and singal processing lib, can be used when applying some algorithm.
Thanks!

 

[monnoliv]

free portable storage oscilloscope project

I have read the sch,and there seems to be one external trig souce, but can't see the internal one,do you implement this using the logic part?

Yes, comparison in the FPGA (or CPLD)

Can it trig stable?

I hope (why not ?)

 

[Ace-X]

ad8331

Could be interesting for Digital Oscilloscope project:

New AppNote from Xilinx "Connecting Xilinx FPGAs to Texas Instruments ADS527x Series ADCs" is available here https://www.xilinx.com/bvdocs/appnotes/xapp774.pdf

Ace-X.

 

[mip]

front end for oscilloscope

Hi,all,
I've read the post in page 10 about software GUI,there are sveral libs that can be used aiming for cross platform:
Thanks!

Have a look at Fox-toolkit, it's stable, easy to program, cross-plattform, nice looking, ...

 

[nj_jack]

+gameboy +oscilloscope

I think it is a very good choice to use Spartan II, which supports more high speed and is easy to design. You can simulate the process through Xilinx ISE software, which is very effective.

 

[Make_Pic]

www.edaboard.com ftopic41841-270

It is the longest project for all time of existence of conference. When there will be a happy end to this project?

 

[simce]

home-built dso (digital oscilloscope)

From all the participients in this project now monnom and me are still active. Sice we are both with many obligations, development goes very, very slow. As you can see we have came to a stage where digital part has to be finished (i mean schematics has to be finished). Than we shall make needed pcb's for test stage, make needed VHDL code for CPLD, make PC software, test all this, make needed corrections and updates... As you can see there are a lot of things to do. Maybe you can help us, because as you can see there is big interest in this project and now everybody is waiting someone else to finish all needed jobs.

 

[TeeSee]

pc avr oscilloscope

Hi Guys,

Here's a quick theory to tear apart. I have a Java enable N0kia phone.
How would you be with a bit of smart Java programming and a simple interface circuit to plug into the bottom of the phone (using the hands-free microphone jack) making a (limited bandwidth) mini-handheld scope?

Just an idea...

TC

 

[simce]

zilog digital oscilloscope

Here's a quick theory to tear apart. I have a Java enable N0kia phone.
How would you be with a bit of smart Java programming and a simple interface circuit to plug into the bottom of the phone (using the hands-free microphone jack) making a (limited bandwidth) mini-handheld scope?

For limited bandwith better solution will be Gameboy DSO, since it is cheap and even if you damage it total lost will be much lower than if you burn your mobile.

 

[Goldorak_couillon]

matlab simulink velleman

Hello gang !

I'm also interrested in building a DSO.
I had a serious look at this endless tread, special attention to soudez.com site that seem to synthesize all your comments/ideas. (please correct me if i am wrong !).

Yet, i'm surprised you work that had for a 50Msps scope only ! :idea:
(max1180 is 105Msps for both channels)

Why don't you target a really challenging project (at least 150Msps per channel ?)
I would imagine a simple architecture with 1 or 2 ADC per channel flowing data into multiple RAM banks. Read back sequence may be managed by an MCU to re-arrange memory content and let the PC seeing sorted samples.

To my knowledge, high end scopes are 8bits resolution.

Top challenge would be to tweak a PC motherboard and go to Gsps range (similar to lecroy architecture) but this may be too hot with hobbyist ressources nfire:

Just a few ideas....

 

[monnoliv]

digital scope low frecuency with dspic

Yet, i'm surprised you work that had for a 50Msps scope only ! Idea
(max1180 is 105Msps for both channels)

Where did you see that MAX1180 is only 50 MSPS per channel ?
Look @ the datasheet, you have 105MSPS for each channel.

Top challenge would be to tweak a PC motherboard and go to Gsps range (similar to lecroy architecture) but this may be too hot with hobbyist ressources

Indeed :?

You're welcome of course in our discussions. Simce is building the prototype for the digital parts. I've to update the website in order to show the latest DSO schematics with the new concept (CPLD+SRAM).

Regards,

 

[Goldorak_couillon]

dso 2150 oscilloscope

Monnoliv,

Sorry for the confusion, I mixed up MAX1180 architecture with another part. You are right that guy is ~100Msps. For next project revision, there is an easy way to move to 200Msps version.

I can't find any trigger comparator in your schematics. why don't you use extra DAC output to feed analog comparator and send comparison result to the PLD ?
I'm not convinced digital trigger is the right way as sampling rate is so high that you will not have time to perform this in digital.

Else, what can I do for help ?

On our side (a friend of mine is also working on this project) we are currently designing host environment (linux & windows). We are very motivated to get this project out.

Do you target a date for powering up main board ?
I have also access to high end piece of equipment (but they do not belong to me ). I can perform digital, analog or RF measurements easily if needed.

Let's move forward.

Regards.