rakesh045
Newbie level 6
i need to implement a sigma delta ADC with 12 bit resolution at the output.
The sigma delta design has the modulator part followed by the digital decimation filter.
i have constructed the modulator part in "system vision"
now i require the DIGITAL DECIMATION FILTER part in vhdl to complete the design.
Can somebody help me in how to construct the filter. it will be great if someone provides a vhdl code here
The sigma delta design has the modulator part followed by the digital decimation filter.
i have constructed the modulator part in "system vision"
now i require the DIGITAL DECIMATION FILTER part in vhdl to complete the design.
Can somebody help me in how to construct the filter. it will be great if someone provides a vhdl code here