Differential pair with active load

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paulmdrdo

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Good day everyone! I just want to ask why the voltage at node N will decrease when Iref increases? Thank you!

 

Hi,

* IRef pulls down the voltage of node N
* Left side Mosfet tries to pull this node up ... with it's R_DS.

Now let's assume R_DS is constant (which isn't the case for steady state... but just for the very first moment)
Then twice IRef would cause twice the voltage drop across DS, thus decreasing the voltage on node N.
But the same time V_GS increases ... this makes that R_DS becomes lower, reducing the voltage drop.....but this can't compensate the voltage drop by 100% because it still needs to make R_DS lower (than at the beginning) which means ...it needs a higher V_GS.
And higher V_GS means lower voltage at node N.

Klaus
 

How is the RDS connected to node N?
 

Hi,

a FET has three connections
* Gate
* Source
* Drain

in your case the left FET`s source is conneted to VDD
and gate and drain are joined at node N.

R_DS is short for: Resistance-Drain-Source.

Klaus
 

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