DFTC violations ! help me!

Status
Not open for further replies.
D

dongdong209

Newbie level 5
Joined
May 5, 2009
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,339
hi, everyone!
warning:cell s% is unknown(black box) because funcitonnality for output pin s% is bad or incomplete.
warning:cell s% is constant 0 value.
warning:design 's%' comes before design s% in the link library; s% will be ignored.
warning: port s% cannot be used as a scan port. it has been previously inferred as an asynchronous signal.
warning: design 'gvc' contains hign-fanout nets. a fanout number of 1000 will be used for delay calculations involving these nets.

these are the typical warnings. help me !
 


please refer the user guide, there is detail description in chapter , the block box is your ram module?
 

u can try this
set_scan_configuration -exclude [get_cells YOURRAM]
 
you have lots of problem to know . user guide is best choice for you
 

if you have the bist design around the ram , you don't care the warning of the bbox(make sure all the black boxes are rams.)
 
Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…