fastscan dft advisor eda tools overview
*** Plan before execution ***
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Design: Design plan
Verification: Verification plan
Test: Test plan
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Design plan: function, timing, power and so on.
Verifiation plan: verification methodology used, code coverage, functional coverage, ...
Test plan: test strategy used, test mode definition, test coverage, fault coverage
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Test strategies:
* Memory:
- BIST: BIST algorithm, such as March,...
- Others:
* Analog blocks:
- PLL:
- ADC:
- DAC:
* Digital blocks:
- Functional testing: (-> run fault simulation or not)
- ATPG
+ scan
# full scan
# partial scan
* Whole chip:
- Boundary scan
-
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See the following also:
"Reduce test costs throughout the design cycle"
www.eedesign.c0m/story/OEG20030616S0108