Hi I am trying to debug a simulation mismatch. I am viewing the design through DFT Visualizer. I gave the pattern index of the simulated pattern. The visualizer shows 9 bits of data for each pin in the instance. It is something like this.
Hi I am trying to debug a simulation mismatch. I am viewing the design through DFT Visualizer. I gave the pattern index of the simulated pattern. The visualizer shows 9 bits of data for each pin in the instance. It is something like this.
It means your FF.Q expected value 0 after unload (shift out the data to the scan chain) .
I can explain more about it :
Q 000 - 100 - 000
[shift in ] - [capture ] - [shift out]
It means your FF.Q expected value 0 after unload (shift out the data to the scan chain) .
I can explain more about it :
Q 000 - 100 - 000
[shift in ] - [capture ] - [shift out]
I see three shift pulse when SE in enabled. So Shift in data of Q 000 means that three 1'b0 are shifted in the scan chain at shift clk right?
Correct me if I am wrong.