circuitbravo
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Hi Friends,I have a doubt.
Suppose a scenario
-2flops - FF1 and FF2,
-Clock period 10ns,
-skew 1 ns,
-C2Q delay 0.5 ns,
-Ts- 0.1ns and Th 0.05 ns.
-same clock to both the flops, just FF2 contains skew of 1 ns.
Sol- We can add Lock up latch in between ff1 and ff2 to avoid data jumping (means ff2 is getting new value of ff1 on same first cycle).
NOW, my question is consider the same scenario as mentioned above but just replace clock skew=7ns .
Now , If we add a lock up latch between ff1 and ff2 still the problem will be there as before.
So what to do if we have skew bigger than half cycle??? Lock up latch wont work here. What should I do here. :?:
I tried to add a dummy flop after ff1 but it won't work.
Please suggest some hint or solution........I will be thankful to you.
- - - Updated - - -
This graph image describes the scenario where even after adding lock up latch , the ff2 still getting the new data from ff1 on the same first cycle. What should I do?
Suppose a scenario
-2flops - FF1 and FF2,
-Clock period 10ns,
-skew 1 ns,
-C2Q delay 0.5 ns,
-Ts- 0.1ns and Th 0.05 ns.
-same clock to both the flops, just FF2 contains skew of 1 ns.
Sol- We can add Lock up latch in between ff1 and ff2 to avoid data jumping (means ff2 is getting new value of ff1 on same first cycle).
NOW, my question is consider the same scenario as mentioned above but just replace clock skew=7ns .
Now , If we add a lock up latch between ff1 and ff2 still the problem will be there as before.
So what to do if we have skew bigger than half cycle??? Lock up latch wont work here. What should I do here. :?:
I tried to add a dummy flop after ff1 but it won't work.
Please suggest some hint or solution........I will be thankful to you.
- - - Updated - - -
This graph image describes the scenario where even after adding lock up latch , the ff2 still getting the new data from ff1 on the same first cycle. What should I do?
