i will help.....the thing is that
eg:
case(1'b1)
begin
a1:
.....
a2:
......
endcase
consider the above code,by looking the above code we can understand that a1 will be executed if a1 is 1 ,else a2 is executed if a2 is 1.
what if both a1 and a2 are 1?
such circuit will get synthesize into priority encoders with a1 having higher priority.......so in order to instruct the tool that we need a mux logic rather than a priority encoder ,we use synopsis parallel case
thats it....