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Designing a DC link Capacitor

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diya0908

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hi, I would appreciate is some one could help me with this question by giving me clues about what formula i could use and how to proceed.

Ques:

The DC supply for the voltage source inverter of the VFD is derived using six pulse diode converter.
Supply voltage is 600V, 3phase, 50Hz. Xd’’=12.5 pu ,X/R ratio as 20. Model the load seen by the DC link capacitor as pure resistor. Take rated load current as 900A.
(i) Design DC link capacitor to get DC voltage with 10% ripple at rated load. (Hint : use simplified formula).
(ii) Simulate the above system. (Assume suitably any missing data)
(iii) Draw the circuit diagram.


P.S: PLEASE HELP ME WITH CLUES TO SOLVE THE PROBLEM
 

I think this looks as though you wish to calculate the value of the smoothing capacitor? Is this correct?

And 10% ripple means it is allowed to discharge by 10% in the gaps between each burst of current?

With the load calculated as 2/3 ohm? ( 900 A at 600 V )
 

I think this looks as though you wish to calculate the value of the smoothing capacitor? Is this correct?

And 10% ripple means it is allowed to discharge by 10% in the gaps between each burst of current?

With the load calculated as 2/3 ohm? ( 900 A at 600 V )


Yes i would like to calculate the value of the capacitor. Could you tell me what formula i could use
 

There is a formula but I can never remember what it is.

Below is a method which is based on the capacitive time constant.

Three-phase rectified... means that a burst of current comes 300 times per second. Each burst needs to be a couple thousand amperes.

(Hint : use simplified formula).

To make it simple we'll consider the load to be a resistor with value 2/3 ohm ( 600V / 900A ).

Therefore the capacitor discharges through 2/3 ohm when idle (during the gap between current bursts). This is 1/300 second. (Keeping it simple).

The capacitive time constant formula is RC. It gives the time that the capacitor changes by 63% of the applied voltage.

(Hint : use simplified formula).

The ripple spec allows the capacitor to discharge by only 10% within the time constant. Hence we must use a Farad value which is 63/10 of the result.

To solve for C, we use: C = T / R
Then multiply by 6.3

So...

C = 6.3 x (1/300) / .67

= 31,343 uF.

A simulation ought to confirm this will work, within a reasonable margin of error.
 

Sound like six diodes on a three phase AC is a full wave rectified three phase source. For full wave you will have six peaks per cycle. Each peak can charge the cap.

For this kind of current you should consider the resistance of AC source and rectifier diodes but since this is a school work problem I assume you will ignore that.

Use I = C * dV/dt. dt (delta time) is time between recharge peaks. dV is how much voltage drop you can tolerate in the gap time between recharge peaks. The larger the cap the less the voltage decays. If dV is relatively small in comparision to peak voltage you can use the piecewise linear formula. Otherwise you have to use the RC discharge V = Vpeak(e^(-t/RC)).
 

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