design of opamp in the bgr

[nodame123]

Hi,
I have heard many places that we need to maximize the PSRR of the opamp used.But I don't get that point. We want the output of the opamp ,which is given to the gates of the CM ,to track variations in the supply so that the variations in the Vsg of the CM become smaller. So, that would imply a poor PSRR for the opamp. (assuming same power supply nodes goes to opamp also)
Am I missing something?
Thanks!

 

[erikl]

I don't think high PSRR is utterly important in this application: The opAmp's task is to guarantee equal currents in both branches, s. this snippet from Baker's book: View attachment Baker_BGR_p767.pdf

Low input offset would be important.

 

[crutschow]

You don't want power supply voltage variations and noise to appear at the op amp output.
That's why you want the op amp to have a high PSSR.

 

[nodame123]

Thanks erikl,but it seems to me,very low psrr is the requirement. Am I missing something?

- - - Updated - - -

Because as I explained in the question, that gate voltage(also,the output of the opamp) must mirror changes in the supply to make variations in vgs equal to zero.That means the opamp must have a psrr of 0db?

 

[erikl]

... it seems to me,very low psrr is the requirement. Am I missing something?

I think crutschow is right with his remark:

You don't want power supply voltage variations and noise to appear at the op amp output.

So PSRR shouldn't be too low. Low input offset voltage is also important to get equal currents in both branches.

Because as I explained in the question, that gate voltage(also,the output of the opamp) must mirror changes in the supply to make variations in vgs equal to zero.That means the opamp must have a psrr of 0db?

No, I don't think so: zero PSRR would mean that all power supply changes and noise would reappear at the opAmp's output, so would be reflected in corresponding current changes.

I think a PSRR ≦ -40dB should be adequate.

 

[dick_freebird]

40dB PSRR would put you at about 1% inaccuracy contribution
for supply voltage. PSRR contribution needs to be a relatively
small part of total accuracy expectation. You have an error
budget (whether you are working to one overtly, or waiting
to be surprised). P, V, T, load, on-chip I*R and charge pumping
and leakage effects all play.

Now, you can relieve the op amp PSRR requirement by putting
it and the bandgap core underneath an internal LDO regulator.
This need not be a great regulator, only decently line-rejecting
(especially useful if you are looking for high frequency PSRR,
where you can't depend on your low bandwidth op amp's
loop gain to take out incoming ripple - a dumb simple source
follower hanging off a reference stack with a lot of gate
decoupling can do wonders for that).

 

[nodame123]

I get the point that lower psrr of the opamp will in turn produce mismatches in the current and then the input offset,but how do you explain the other point,that the Vg(also the output of the opamp) must mirror changes in the supply so that the current mirror config will give currents which are not dependent on the supply changes,which further decreases the power supply dependence for the reference voltage(output of BGR) ?
Is this a tradeoff or an anomaly?