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Design of a Differential CMOS Amplifier

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Dymtra

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Hi, I am designing a CMOS differential amplifier for a course, I must obtain a gain of 20 dB and a cutoff frequency of 100 MHz.

This is the circuit

circuit.JPG

I got my transfer function, and from there my gain is given by Av.JPG , i can see that it's given in terms of the transconductance which i can obtain with width and lenght values, but the other part is given by lambda, which is a parameter that the teacher didn't gave us. Is it too critic to know it for the design?

My cutoff frequency is given by wo.JPG which is also in terms of the channel lenght modulation resistances, and i found it difficult to calculate it without knowing the value of lambda, is there other way?

Also the teacher mentioned that the output common mode has to be at least half of Vdd, that would be 1.8V / 2, so I used the saturation current equation to obtain the width and lenght relationship for a value of Vgs = 0.9 V and the half of the current, like this Com.JPG
i don't know if it's ok to make that assumption to obtain the values of width and lenght for the p-MOS.

It would be great to hear your suggestions :smile:
 

... the other part is given by lambda, which is a parameter that the teacher didn't gave us. Is it too critic to know it for the design?
Yes, it's important. Find here a diagram with measured Early voltage values vs. Channel Length and VDS for a 0.18µm tech. (I suppose that's the process you're using?).
Early voltage VA = 1/λ


i don't know if it's ok to make that assumption to obtain the values of width and lenght for the p-MOS.
I think it's good for a first approximation.
 
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    Dymtra

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(I suppose that's the process you're using?).

I'm using a 130nm process, from the diagram I can see that lambda it's not constant, so in order to choose the lenght values i must have this kind of diagram for my process?

Also I've tried to simulate the circuit, but i can't get the three p-MOS to get in the saturation region, they always stay in the linear region I've tried to change their W/L relationship but they only change I could observe was in the gain.
 
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I'm using a 130nm process, from the diagram I can see that lambda it's not constant, so in order to choose the lenght values i must have this kind of diagram for my process?
It ain't necessarily so ;-) - but it would help!

Also I've tried to simulate the circuit, but i can't get the three p-MOS to get in the saturation region, they always stay in the linear region I've tried to change their W/L relationship but they only change I could observe was in the gain.

In order to get help, you should show your circuit diagram with your current W/L ratios!
 

In order to get help, you should show your circuit diagram with your current W/L ratios!

Ok, I'll post it tomorrow because I only have access to the simulator through my University and i don't remember quite well the last values I used
 

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