Regarding the mapping of transistors, you need to understand both technologies well. Sometimes you can't map cells 1:1 , but it depends also on the properties of the source cell, which target cell to choose.
Migrating schematics in that particular path (IBM -> TSMC) you may face trouble with different symbols, symbol orientation, different number of terminals, mapping of netname properties to wires etc.
There is no simple automated rule-based conversion for analog circuits, because the transistors' electrical behavior is too different. A rule-based schematic conversion gives only a starting point for a subsequent re-sizing based on simulation runs. That's also the reason why analog layout migration on GDSII level usually fails.
MunEDA sells analog IP migration software for these purposes (schematic migration & resizing), see **broken link removed**