Design compiler Warnings cell 'C45488' does not drive any nets. (LINT-1)

[maturainfankam]

Hello all together,
i use Design compiler to synthetisize my design. i get the warnings #Warning: In design 'komp_shift_sel', cell 'C45488' does not drive any nets. (LINT-1)#
i don't know how to deal with this problem.
if somebody can help a we be very gratefull.
best regards.
maturain

 

[sharath666]

It basically means that the cell does not have a load. You will find several such warnings. You can ignore them safely.

 

[ads-ee]

i use Design compiler to synthetisize my design. i get the warnings #Warning: In design 'komp_shift_sel', cell 'C45488' does not drive any nets. (LINT-1)#

It basically means that the cell does not have a load. You will find several such warnings. You can ignore them safely.

Regardless of what sharath66 says you should verify that those warnings aren't due to some error in the RTL that leaves an output with no load. If there are also a lot of warnings about unused logic being removed because of an output with no load, then I'd make absolutely sure that it's not caused by that cell not driving a net.

 

[maturainfankam]

tanks you for your quiet answers,
1- sharath666: as you say, i have several such warnings
2- how can i check, if the warnings are due to some error in RTL modell, because a don't get a error by the RTL Simulation. I don't have a Interface with the name cell 'C45488' . How can i find the Interface?
Best regards

 

[sharath666]

You will need to find from the netlist which logic element is being inferred as that particular cell. You will need to go back to the RTL and check whether the load exists for that or no. A simple example which I can give you is of a defined 32 bit data bus of which you are driving only 10 bits. or a case in which you are generating a flag but not using it anywhere else.

 

[layowblue]

you better run lint before diving into synthesis report.

 

[sharath666]

you better run lint before diving into synthesis report.

That's a good suggestion...