Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

deposit a value to all registers in NCSIM with VHDL design

Status
Not open for further replies.

Anna_design

Newbie level 1
Newbie level 1
Joined
May 22, 2013
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,288
I have a VHDL design which has non-resettable flip flops in it. I'm wanting to put deposits on them all but can't think of a practical way of doing it (its a very big design that I don't know well)
One thought was to deposit on all registers before the reset signal and this would initialise all my non-reset flip flops.
I need to be able to deposit 0 and 1 and ideally a random value too (but that is a nice to have).
There looks like there is ncinitialize but this is only for Verilog designs.
Has anyone found a way of doing this for VHDL?
Thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top