Anna_design
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I have a VHDL design which has non-resettable flip flops in it. I'm wanting to put deposits on them all but can't think of a practical way of doing it (its a very big design that I don't know well)
One thought was to deposit on all registers before the reset signal and this would initialise all my non-reset flip flops.
I need to be able to deposit 0 and 1 and ideally a random value too (but that is a nice to have).
There looks like there is ncinitialize but this is only for Verilog designs.
Has anyone found a way of doing this for VHDL?
Thanks
One thought was to deposit on all registers before the reset signal and this would initialise all my non-reset flip flops.
I need to be able to deposit 0 and 1 and ideally a random value too (but that is a nice to have).
There looks like there is ncinitialize but this is only for Verilog designs.
Has anyone found a way of doing this for VHDL?
Thanks