Deep nwell just provides a well to put p-implant. And the most important thing to consider is that the p well to dn well never forward biases. That is usually done by reverse biasing to the highest supply. The PMOS devices in the n-well usually are not in the deep nwell. If they are, then you’re right, you can’t connect them all together because they’ll create an ERC violation/short. The only time I’ve seen pmos devices in deep nwell is when they’re trying to increase the stand-off voltage. When I made my initial comment, I assumed only the NFETs would be in the deep nwell and you’d have a separate region for the pfets, there are standard cell guard rings in some PDKs that create this type of structure.