decoupled cap in LTM8053

[mayang]

Hi, I am trying to use the ADI module regulator LTM8053

https://www.analog.com/media/en/technical-documentation/data-sheets/LTM8053-8053-1.pdf

.
And I tried to look for its EvalBoard or the Demo manual, in ADI they do have demo manual for their specific ICs in order for the consumer to have a reference in designing. Here is the demo manual of LTM8053 https://www.analog.com/media/en/technical-documentation/user-guides/dc1934af.pdf .

My questions is, how to calculate the value of the Decoupled capacitor in the input and output?? Since it is not included in the given table of LTM8053 datasheets for the recommended component values.
I believed it is best to use two different values of capacitor to decouple to filter out frequencies and to reduce EMI.

This is the usual application of the LTM8053

And this is the diagram of Demo Manual of LTM8053

Looking forward for your response.
Thank you!

Best regards,
jess

 

[stenzer]

Hi,

as you are not able to find the a proper capacitance recommendation, I assume your desired input and output combination is not listed, please let us know which voltages are planned to used.

In the datasheet on page 16, it is mentioned that the listed capacitances values are the recommended minimum values. You can also install larger values. The use of ceramic capacitors is recommended, with a low ESR. Keep in mind, the recommended X5R and X7R capacitors are class 2 ones [1], which have reduced capacitance due to DC biasing (lower effective capacitance if operated close to the maximum rated voltage).

Kemet provides an online tool [2] where you can have a closer look on the impedance vs. frequency behaviour for different capacitor combinations.

Here, I would a use capacitance values which are close to your target voltages, you may use the next higher listed capacitance value. If possible, I would use capacitors with a higher voltage rating than the recommended ones (compared to the output voltage), if they are not too pricy. It seems, for the input they recommend 4.7u for every listed combination. Further, if you have no space limitations, include place holders where you might populate additional capacitors, if required.

Have you checked LTspice if this model is included? This would allow a preliminary test and a simulation based prediction, how the regulator behaves for different conditions e.g. load changes.

[1] https://www.eeworldonline.com/the-effect-of-dc-bias-on-mlcc-class-2-capacitors/
[2] https://ksim3.kemet.com/

BR

 

[mtwieg]

I think you're overthinking things.

Cin is typically not critical, and the table makes it pretty clear that they recommend a 4.7uF MLCC for all configurations. It's not surprising they also have a larger electrolytic cap on their demo board (can provide damping for the inductance of long wires connecting to Vin).

For Cout, the table gives a clear trend: lower Vout magnitude requires larger Cout. If your exact Vout is not on the table, just use the Cout for the nearest one, or interpolate nearby rows.