shreeharshakg
Newbie level 4
hi,
sir, i'm working on DA-FIR filter generation using sysgen. i want to design a LUT for the same . so i am using vhdl code to design the LUT. i have designed the FIR filter. so i'm getting the coefficients form it . there are real numbers.. eg: 0.27656, -0.0984,... so initially i have to convert these to 8-bit binary digits. then depending on the sign bit addition/subtraction must be performed and stored in LUT.
can anybody please help me to how t writw the code for above constraints...
please do the needful... thanking you...
yours sincerely,
Shreeharsha
sir, i'm working on DA-FIR filter generation using sysgen. i want to design a LUT for the same . so i am using vhdl code to design the LUT. i have designed the FIR filter. so i'm getting the coefficients form it . there are real numbers.. eg: 0.27656, -0.0984,... so initially i have to convert these to 8-bit binary digits. then depending on the sign bit addition/subtraction must be performed and stored in LUT.
can anybody please help me to how t writw the code for above constraints...
please do the needful... thanking you...
yours sincerely,
Shreeharsha