DDR3 clock confusion

[syedshan]

hello every one


I have a little confusion about DDR3 clocking. Though I am not sure it is very critical, but it has made me confused for several months.

For example: First of all I am using MIG based designed for Xilinx V6 fpga + DDR3

My clk_mem = 2 x CLK => CLK = 150 MHz, then clk_mem = 300 MHZ.

Now my question is, is the internal DDR3 clock is 600 MHZ, i.e. twice of clk_mem and also the IO ports DQ/DQs connected to the DDR3 also working with this same 300 Mhz clock speed or 600 Mhz

Thanks

 

[pbernardi]

DDR3 works at double rate, meaning the sample at rising and falling edges.

Most manufactures make confusion with it. A DDR3 that works with a 533 MHz clock is capable of 1066 Mtransfers/s, but manufactures sometimes sell it as a "1066 MHz DDR3", which is wrong.

Its more a marketing issue than a technical one. On practical way, when DDR3 sellers rates the component, divide this number by two to have its original frequency. However, the component datasheet may show its real frequency.

So, answering your question, your clock is 300 MHz and your transfer rate is 600 MT/s