I am doing something similar at the moment (a 100MSPS scope), so my suggestion would be to use one of Xilinx's FPGAs, because their ISE suite includes an IP core for handling DDR with their Spartan/Virtex series chips.
Since the ISE webkit supports this and is free, this makes it quick and easy to do (well ish).
Their cheapest FPGAs that support it would be a Spartan 3: could be got for under £10, and some of Micron's 256MBit DDR would only set you back another £5/6 so the biggest cost would be PCB manufacture.