For a 50 Hz inverter as apparently intended, a minimum bus capacitor size will be also set by the 100 Hz load modulation, assumed you don't want to pass the 100 Hz ripple to the input source. That's an essential difference to a 3-phase inverter that consumes constant instantaneous power with sine output. You get the minimum required capacitance by specifying a maximum DC bus voltage ripple.
Besides low frequent ripple, the bus capcitors have to buffer PWM frequent ripple. It's usually smaller than the load current, depending on the output inductance. But to avoid inductive overvoltages, you'll possibly want low inductance "snubber" capacitors near to the output bridge, e.g. polypropylene foil capacitors.
IMHO the calorimeter setup is unnecessary complicated (and probably not very accurate). Electrical measurements of in- and output power will usually give better accuracy in efficiency determination. Besides transistor performance, actual efficiency will depend very much on gate waveform optimization.