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DC gain and unity-gain frequency requirements for an amplifier

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electronics_rama

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Hi All,

Please find the below structure of a unity gain buffer with a capacitive feedback network. What decides the DC gain and unity gain frequency of the amplifier, "AMP" used in the below circuit?

1662395805636.png




Thanks.
 

The symbol is an op amp. I assume ground goes to the non-inverting input?

The two caps C1 C1 might act similar to identical resistors if we expect to approach this as a normal AC signal operational amplifier. Gain=1 but only if it's a waveform in the right part of the frequency spectrum and which does not distort when going through a series cap.

It's hard to evaluate all factors influencing behavior... for example, the capacitor load having a much higher value than C1 C1. It might produce DC action, it might not.
So it's hard to predict all factors present.

I could be wrong. It would help if you state your own approach to this exercise.
 

It looks like the DC level is periodically refreshed to ground by a clock controlling the feedback path switch. DC gain would be -1, I think (inverting side is input).

The unity gain frequency will be a function of the internals of the op amp in conjunction with the load capacitance. Typically, fu = gm/(2*pi*Cl) where Cl is Total Cap load, CL + C1*C1/(C1+C1)
 
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I am not familiar with this problem, can you explain further....?
A square wave for instance becomes spike-y when passed through a series capacitor. That is, in many or most circuits where finite resistance is present, and especially where the C value is tiny (as in the schematic above, 2 pF).

A sine wave retains its shape when passed through a series cap.

The schematic above does preserve all waveforms unchanged, in theory. This is because: a) op amp inputs have infinite resistance when considered as ideal components, and b) the feedback loop is entirely capacitive impedance not ohmic resistance.
 

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