Data into a FPGA - define Values of '0' and '1' in into FPGA

[Speedy750]

Data into a FPGA

Hello,

I try to get Data into a FPGA. Isn´t possible to define Values of '0' and '1' in kind of varables into the vhdl program of a FPGA (for example: Actel APA)?

for example with:
CONSTANT data : bit_vector := " 1001_1110 " ;

After compile these data is away.

Is there any possibility to keep this data into the fpga after compile?

gest regards, Speedy750

 

[engr.ja]

Data into a FPGA

hi,
your question is little bit confusing can you explain little more? and what do you mean by compile? do you mean synthesis?

 

[Speedy750]

Re: Data into a FPGA

Hi engr.ja,

please excuse me for the no complete question.
I mean the following:

I´m searching a short and easy way to save a lot of datastreams into the APA FPGA from ACTEL. It´s possible, to save the data into the sram, but this isn´t what I will do.

In other programming languages (for example: C) you can define variables with values, but if you do this in VHDL and you compile (synthesis) your design, the data (variables with values) won´t keep into the FPGA.

Normaly the FPGA make a netlist from the design (VHDL code) and isn´t able to save the values from the vhdl code.

I would like create somethink like this:

data := "10101011"; -- data
data2 := "00101011"; -- more data
...
...
output1 <= shiften(data); -- no correct code for shiften
output2 <= shiften(data2); -- no correct code for shiften


The datastreams should go on a output with a shiftregister

Is there a trick to do this?

Speedy750

 

[sudhirkv]

Re: Data into a FPGA

use a reset logic and on reset you hardcore the initial value like

if(!reset)
value = 8'b10011001;
else
{
your logic;
}

 

[shitansh]

Data into a FPGA

yes this will work or else you can use FSM also.