arjun_p_cet
Newbie level 5
measurement sfdr dac
hi all....I have designed a 10 bit 100 MHz current steering DAC in Tanner EDA.... To measure SFDR i need to use an ideal ADC at the dac input.....But the problem is that Tanner doesnt support verilog A models for ideal ADC...and i cant find a spice netlist for an ideal 10 bit ADC....so plz do help me....
thanks in advance
hi all....I have designed a 10 bit 100 MHz current steering DAC in Tanner EDA.... To measure SFDR i need to use an ideal ADC at the dac input.....But the problem is that Tanner doesnt support verilog A models for ideal ADC...and i cant find a spice netlist for an ideal 10 bit ADC....so plz do help me....
thanks in advance