D Flipflop Set and Reset Priority order

[sunidrak]

Hi,

If SET and RESET both are present in a D Fliflop .

• when Synchronous SET and Synchronous RESET are Present which has the highest priority and why ?
• when Asynchronous SET and Synchronous RESET are Present which has the highest priority and why ?
• when Asynchronous SET and ASynchronous RESET are Present which has the highest priority and why ?
• when ASynchronous SET and ASynchronous RESET are Present which has the highest priority and why ?

Regards
SUNIL

 

[Prashanthanilm]

Sunidrak,

1. Actually , the design is made such that there does not exist a situation ie both are ON.

2.If there exists a situation, when both are ON, the Priority is given.
The Priority purely depends upon the designer on what product he is working on and what outcome he is expecting.

There is no Random pick

Hope it answers your question.

 

[sunidrak]

Sunidrak,

1. Actually , the design is made such that there does not exist a situation ie both are ON.

2.If there exists a situation, when both are ON, the Priority is given.
The Priority purely depends upon the designer on what product he is working on and what outcome he is expecting.

There is no Random pick

Hope it answers your question.

Prashanthanilm,

My question is If both are there then which has got the highest priority ?? Whether RESET has or SET has ?
hope you got some clue !

 

[FvM]

There's of course a kind of "priority" between asynchronous and asynchronous inputs.You'll hopefully understand it if you consider how they work. As a rather trivial fact, asynchronous inputs will always override the synchronous.

The other point has been clearly answered in the above post.

There's no natural priority, it has to be designed. The actual behaviour can be determinde from datasheet of commercial products or has to be determined by analyzing the transistor level circuit. Some designs might expose an illegal output coding when both asynchronous inputs are asserted simultaneously.

 

[sunidrak]

There's of course a kind of "priority" between asynchronous and asynchronous inputs.You'll hopefully understand it if you consider how they work. As a rather trivial fact, asynchronous inputs will always override the synchronous.

The other point has been clearly answered in the above post.

There's no natural priority, it has to be designed. The actual behaviour can be determinde from datasheet of commercial products or has to be determined by analyzing the transistor level circuit. Some designs might expose an illegal output coding when both asynchronous inputs are asserted simultaneously.

Oh I got you now Thanks for your replay

Regards
SUNIL

 

[Prashanthanilm]

The is no default priority signal. Depends on the designer.