arpit_655
Newbie level 5
hi,
i am designing a DAC using charge scaling architecture. reference voltage is 2.5V.
To buffer the output i need to design a voltage buffer (0.25um , VDD=2.5V) with very low input capacitance. so buffer should be rail to rail.
could someone please tell me how to go about designing the buffer.......
& how to eliminate the spikes coming at output......
waiting for replies.....
i am designing a DAC using charge scaling architecture. reference voltage is 2.5V.
To buffer the output i need to design a voltage buffer (0.25um , VDD=2.5V) with very low input capacitance. so buffer should be rail to rail.
could someone please tell me how to go about designing the buffer.......
& how to eliminate the spikes coming at output......
waiting for replies.....
