Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] cypress cpld has spikes on I/O lines when power on condition (tri state)?

Status
Not open for further replies.

saidutt

Member level 2
Joined
Dec 4, 2009
Messages
43
Helped
6
Reputation
12
Reaction score
4
Trophy points
1,288
Location
india
Activity points
1,592
hi friends,
i am using cypress cpld with part no: cy37256p160-125axi.
when power is switched ON in Tri-state condition, the cpld I/O lines has spike V(peak to peak)=1.63 V and T=1.7m sec.
i have try to search in the data sheet for this issue. i couldn't find any information.
please help me out with any document has this issue mentioned for documentation purpose to address for my higher authorities.

thanking you
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top