Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Current mirror offset

Status
Not open for further replies.

Vlad Cretu

Newbie level 6
Joined
Jul 12, 2014
Messages
14
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,385
Hello,

I have the following at the output of a PTAT and CTAT which are ok. The problem is that the mirrored current has an offset, which is further amplified when i double it at the output.

Capture.PNG


Regards,
Vlad
 

Your digital-trimmed cascode mirror has not one tap with
a dead match 1:1 ratio. Is the problem really a current
offset, or is it a current ratio problem? Seems to me like
the trim scheme is not ideal.

The L=40 mirror rack seems still prone to have lambda
error, why not a P cascode?
 

I do agree, it is not ideal. It is mostly due to the requirements.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top