[SOLVED] Current Mirror Inaccuracy

Status
Not open for further replies.

chandlerbing65nm

Member level 5
Joined
Apr 5, 2018
Messages
80
Helped
0
Reputation
0
Reaction score
1
Trophy points
8
Activity points
709
Hi all!

I'm using current mirror to copy the current of my circuit from Voltage to Current converter, but when I simulated it the current(Io) at the mirrored side seems not an exact copy of the Iref(attached image). Why this happens? I need a constant current Io.

Thanks for reading.
 

Attachments

  • clock gen.PNG
    14 KB · Views: 79
  • output.PNG
    15.8 KB · Views: 62

I guess the difference is coming from VDS voltages of 2 upper PMOS transistors due to NMOS .
While the current is increased the difference becomes more evident.
 
You find the answer in any CMOS circuit design text book that discusses the behavior of real MOSFET transistors. You should particularly look for channel length modulation parameter λ. It causes a Vds dependent Id slope in saturation.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…