convert std_logic to integer

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rakesh_aadhimoolam

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vhdl convert std_logic to integer

hello folks i have a small doubt of how exactly to write a package to convert std_logic to integer or vice-versa.

thanks in advance
 

std_logic to integer

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the same question was asked here
 

vhdl std_logic to integer

rakesh_aadhimoolam said:
hello folks i have a small doubt of how exactly to write a package to convert std_logic to integer or vice-versa.

thanks in advance
Click to expand...
I recommend you take a look at VHDL FAQ @ **broken link removed**

A quick answer is to use:

use ieee.numeric_std.all;

and then use the functions:

to_integer
to_unsgined

HTH
Ajeetha, CVC
www.noveldv.com
New Book: A Pragmatic Approach to VMM Adoption 2006 ISBN 0-9705394-9-5
http://www.systemverilog.us/
 

vhdl integer to std_logic

use conv_std_logic_vector(integer(name),no.of bits for standard logic vector needed);
for converting to integer use straightway
conv_integer(std logic vector(name));
no additional library needed for this
 

vhdl convert std_logic_vector to integer

amit_8561 said:
use conv_std_logic_vector(integer(name),no.of bits for standard logic vector needed);
for converting to integer use straightway
conv_integer(std logic vector(name));
no additional library needed for this
Click to expand...
The usage of conv_* functions is discouraged as they are not *IEEE* standard functions and different vendors have/had different interpretations of these functions. Read VHDL FAQ for more on this. **broken link removed**

Regards,
Ajeetha, CVC
www.noveldv.com
New Book: A Pragmatic Approach to VMM Adoption 2006 ISBN 0-9705394-9-5
h**p://www.systemverilog.us/
 

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