That depends on the speed of the signal. Each input port has parasitic capacitance. Too big capacitance will ruin the high signal since the driver can not reach the expected level in time. Just read the datasheet of the D-gate and find out the maximum port capacitance. Multiply the number by 20 you will get the total capacitance. Then check the output port's driving strength, usually specified by maximum source/sink current. This will help you to estimate how much time the signal will increase/decrease to the
threshold voltage (HIGH 70%, LOW 30% VDD for CMOS). Then you will know if the signal speed is too high or not.