confusion with signals getting updated please help

[s3034585]

hi guys
i am trying to preform some operations on a array of signals in the same clock cycle. i am getting confused with the way they are being updated. can any one tell me how to perform multiple operations in one clock cycle.

i have attached the code in a file please have a look at it and let me know how update the signals or rather refer the signals.

in this code as you can see that i am computing a value on frc_bit and then
refering it in the process to store in a shift register. when load is 1 and then i store this bit in shft_reg_r3 along with the 7 bit of vector in it. the problem is that when i store frc bit in shift reg r3 it takes a wrong value. so i added this signals to list and found out that frc bit is not updated immediately and because of this the shift reg_r3 stores the old value and not the new value.

can any one please tell me how to avoid this and store the correct value from the frc_bit into the shift reg...

if any this is not clear please let me know...

thanks in advance...

tama

 

[tkbits]

Yes, the value of Reference_temp used to generate frc_bit is the registered value, which is the "old" value.

As Reference_temp is only a shift register, just adjust the bit position you use to generate frc_bit.

The output of a register is always delayed by the clock signal. To avoid the delay, use signal values from the input side of the register.

 

[s3034585]

Yes, the value of Reference_temp used to generate frc_bit is the registered value, which is the "old" value.

As Reference_temp is only a shift register, just adjust the bit position you use to generate frc_bit.

The output of a register is always delayed by the clock signal. To avoid the delay, use signal values from the input side of the register.

hi thanks for your suggestion
but i have a dought that is if i use a diff bit for calculation and then my value is going wrong. for eg in this case i am using refrence_temp(113) if u use the input for it that is refrence_temp (112) then my value goes wrong .can you please tell me what do i do in this case..

please help me it is imp for me...
thanks in advance.

 

[tkbits]

If the only use of Reference_temp is to provide a shifted version of vector_in, then separate the registering of vector_in from its shifting. The shifting does not need a shift register, it just needs renaming of the signals, which can be done with an assignment.

process (clk)
begin
  if rising_edge(clk) then
    if vectorin_wr = '1' then
      vector_in_register <= vector_in;
    end if;
  end if;
end process;

Reference_temp(Ks_width-1 downto 0) <= vector_in_register(Ks_width-2 downto 0)&'0';

 

[s3034585]

hi guys
i need some help in understanding of how to implement a functionality.
i have 3 reg r1(10- 0), r2( 10-0) & r3( 10-0).
bit 5 of all the register decides whether the registers will shift or not in every clock cycle. thus we store these bits as mv1, mv2, mv3 for r1, r2,r3 respectively.

r3 register has a feedback also as follows:
r3(0)= r3(10) xor r3(9) xor r3(8) xor r3(4) .

initially there are some garbage bits in r3 from r3(10) - r(8). hence till the time i get all these bits, i need to store them in a shift register. once i get all the 3 bits i need to compute the feedback and now put it at location r3(3) because inorder to get the 3 bits r3(0) made a move of 2 locations. so initially we need to make a movement of 2 clock cycles to get all the bits later it is just one movement to get the feedback and it will be stored at r3(1) now..

can any one please please tell me how to implement this logic using shift registers.
Thanks in advance.

tama