They should be identical and should result in identical circuits.
Take a look at the pre-synthesis schematic and the post synthesis schematics for both styles of coding it.
The only other thing that may be causing some difference could be something do with the definition of expression1/2 whereby the two options evaluate differently (though I can't see anyway that could happen).
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I think you should show us the real code that is having a problem rather than the pseudo code. It could be something else that is the problem.
Can you check the synthesis report of the failing case and compare it with the corresponding report of the pass case? I am guessing something is optimized away...