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While open_loop_gain state, my understand is that all mos in opamp should be satisfied with Saturation.
first, i use dc sweep offset voltage between inverter(vip) non-inverter(vin)
Thus, i put Vos(offset voltage) -1.4mv on vip such that vin=vdd/2, vip=(vdd/2)-1.4mv and all mos in saturation.
.TF V(vout) vip also let me obtain open loop gain in hspice report.
is this right way to find open loop gain??
I am not quite sure what you really did, but - as far as I can see - at first you have placed a small voltage source between both inputs? That's not correct because this allows no stable operating point.
hi Lvw,
as a result, the right biasing is vip(non-invert) less than vin(invert) 60uV since DC sweep over vip at above figure.
is it right?
hi FvM,Open loop gain as a frequency dependant parameter is determined in an AC measurement
does the "linear voltage range" you say is the area in flatten curve(ex:vdd/ground) without area in DC transfer curve?and needs an auxilary bias circuit to operate the OP in it's linear voltage range, or at least an exactly adjusted input bias cancelling the OP's offset voltage.
yes, the second configuration circuit is inv in ground.* Inv. input is grounded? (it must be at app. 1.65 volts)
x-axis is DC sweep over vip within first and second configuration.* What is on the x-axis of the drawing? (Drop the question, it is Vout).
yes, the second configuration circuit is inv in ground.* Inv. input is grounded? (it must be at app. 1.65 volts)
x-axis is DC sweep over vip within first and second configuration.* What is on the x-axis of the drawing? (Drop the question, it is Vout).
i think parameter unity gain frequency, phase margin, gain margin are frequency dependant in AC measurement.Open loop gain as a frequency dependant parameter is determined in an AC measurement.
does "linear voltage range(L.V.R)" mean slop curve(-1.45mv~-1.35mv) without vdd/ground flatten curve as following figure??and needs an auxilary bias circuit to operate the OP in it's linear voltage range, or at least an exactly adjusted input bias cancelling the OP's offset voltage.
yes, offset voltage is -1.45mvYes, I think so. However, the offset is negative, isn' it? (-1.45 mvolts app.)
I have no idea what you mean???Your inverting amplifier has again of +5 if referenced to the pos. terminal.
Do you mean actual biasing: vin=0.33v, vip= 0.33v-1.45mvolts while vdd=3.3v???Therefore the dc voltage for correct biasing at Vdd/2 must be (Vdd/2)*0.2=0.1*Vdd.
yes, the method is good i have ever used it.As another alternative - if you like to stay at Vdd/2 - put a large Capacitor in series with the resistor at the inv. terminal.
ffsher100, I have detected another source of error:
Your inverting amplifier has again of +5 if referenced to the pos. terminal.
Therefore the dc voltage for correct biasing at Vdd/2 must be (Vdd/2)*0.2=0.1*Vdd.
As another alternative - if you like to stay at Vdd/2 - put a large Capacitor in series with the resistor at the inv. terminal.
Thus, the dc gain is for the pos. input is unity and for the oscillating frequency you still have app. "4".
i try ac analysis by biasing condition as following(vdd=3.3v):
case 1: vip=(vdd/2)-1.40mVolts
case 2: vip=(vdd/2)-1.45mVolts
case 3: vip=(vdd/2)-1.5mVolts
all three cases on vin keep vdd/2.
after ac analysis, the three cases got different result on (open loop)gain and unity gain frequency.
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