Dear LvW,
please find the verilog-A code which i have been using. i have set a gain of 32db and pole freq of 0 for opamp.
********************************************************************
// FUNCTION: Ideal/Non-ideal OpAmp
//
// GENERATED BY: Cadence Modelwriter 2.30
//
// Description: Universal Opamp
// vin_p - positive or non-inverting input
// vin_n - negative or inverting input
// vout - single ended output
// This model is an example, provided "as is" without express or
// implied warranty and with no claim as to its suitability for
// any purpose.
//
// Known problem:
// The output waveform displays ringing when the second order
// pole
// is specified.
//
// PARAMETERS:
// dcopt = DC operating point, or t=0 voltage [V]
// gain = Open loop voltage gain, or DC voltage gain
// ibias = Input bias current, the value is the same for
// both inputs [A]
// pole_freq = Dominant pole frequency, or first corner
// frequency, eg. point where gain begins to roll of by 6 dB /
// octave [Hz]
// pole_sec = Second pole frequency, point at which gain
// rools off more steeply [Hz]
// rin = Differential input resistance, or resistance
// measured between both inputs [ohms]
// rout = Single ended output resistance [ohms]
// slewn = Maximum negative output voltage slope [-V/S]
// slewp = Maximum positive output voltage slope [V/S]
// vin_offset = Input offset voltage, the voltage required for
// 0 volts output [V]
// vsoft = Output soft clipping point, measured from the
// supply rails [V]
//
`include "discipline.h"
`include "constants.h"
// model opamp - Non Ideal OpAmp Model
module opamp (vout, vin_p, vin_n, vspply_p, vspply_n );
inout vin_p , vin_n;
inout vspply_p, vspply_n;
output vout;
electrical vin_p, vin_n, vout, vspply_p, vspply_n;
parameter real gain = 43 exclude 0.0;
parameter real pole_freq = 0.0;
parameter real rin = 12.0K exclude 0.0;
parameter real rout = 75.0;
parameter real ibias = 0.0n;
parameter real vin_offset = 100u;
real c1, r1;
real r_rout,gm_nom, vin_val;
real vmax_in_p, vmax_in_n, iin_max_p, iin_max_n;
electrical cout, vref;
analog begin
@(initial_step or initial_step("dc", "ac", "tran", "xf")) begin
r1 = gain;
gm_nom = 1.0;
c1 = 1/(`M_TWO_PI * pole_freq * gain);
r_rout = rout;
end
vin_val= V(vin_p, vin_n) + vin_offset;
// ------ Vref is at Virtual Ground
V(vspply_n, vref) <+ V(vspply_n) + (0.5*(V(vspply_p)-V(vspply_n)));
// ------ Input Stage
I(vin_p, vin_n) <+ vin_val / rin;
I(vref, vin_p) <+ ibias;
I(vref, vin_n) <+ ibias;
// ------ GM stage
I(vref, cout) <+ gm_nom*vin_val ;
// ------ Dominant Pole.
I(cout, vref) <+ ddt(c1*V(cout, vref));
I(cout, vref) <+ V(cout, vref)/r1;
// ------ Output Stage.
I(vref, vout) <+ V(cout, vref)/r_rout;
I(vout, vref) <+ V(vout, vref)/r_rout;
end
endmodule
********************************************************************
and regarding stability i am simulating only error amplifier with type-3 compensation arrange ment and i had already attached the waveforms in my previous post. please can you help me make more clear about this. I hope i have provided all details possible.
Ni1009